01469nam a2200145 a 4500020002700000020003000027100002200057245007700079250001200156260003600168300001300204490002900217520100700246856007001253  a0132599708 (paperback)  a9780132599702 (paperback)1 aPalnitkar, Samir.10aVerilog HDL: a guide to the digital design and synthesis CD-ROM included  a2nd ed.  a[S.l.] :bPrentice Hall,c2003.  a496 p. ;1 aPaperback) (2nd edition.  aAppropriate for all courses in digital IC or system design using the Verilog Hardware Description Language (HDL). Fully updated for the latest versions of Verilog HDL, this complete reference progresses logically from the most fundamental Verilog concepts to today's most advanced digital design techniques. Written for both experienced students and newcomers, it offers broad coverage of Verilog HDL from a practical design perspective. One step at a time, Samir Palnitkar introduces students to gate, dataflow (RTL), behavioral, and switch level modeling; presents the Programming Language Interface (PLI); describes leading logic synthesis methodologies; explains timing and delay simulation; and introduces many other essential techniques for creating tomorrows complex digital designs. Palnitkar offers a wealth of proven Verilog HDL modeling tips, and more than 300 fully-updated illustrations, examples, and exercises. Each chapter contains detailed learning objectives and convenient summaries.40uhttp://www.amazon.com/exec/obidos/ASIN/0132599708/chopaconline-20