Design of Optimized Finite Impulse Response Filter Using Ultra Scale FPGA (ME Thesis)
By: Javed Ali 18-MIAC-02 Supervisor - Dr. Bhagwan Das.
Contributor(s): Department of Electronic Engineering.
Material type:
BookPublisher: Nawabshah QUEST 2022Description: 119p.Online resources: Click here to access online
| Item type | Current location | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|
Thesis and Dissertation
|
Research Section | Available | MP/83-1182 | |||
|
Thesis and Dissertation
|
Research Section | Available | MP/83-1183 | |||
|
Thesis and Dissertation
|
Research Section | Available | MP/83-1184 |
Total holds: 0
Click on an image to view it in the image viewer
There are no comments for this item.